Basic Troubleshooting - Logic Analyser basics

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Basic Troubleshooting - Logic Analyser basics

Post by rubber_jonnie »

As promised, here is a very basic overview of what a logic analyser (LA) can do for you, and what it's purpose is.

Firstly, what is it? If you've read other items in this series, you will have seen me discussing a logic probe, which can show you different TTL states on a single pin using a visual and/or audible signal.

Imagine then a logic probe with 8 or more channels that can not only visualise the value of 8 or more TTL states at once, but also allow you to use software to record those states so that you can review them after the fact to work out what is going on!

Well that is what a Logic Analyser is. Rather than trying to probe individual pins and figure out what is going on, you can essentially hook up and capture the data like you videoed it, and walk through any part of the capture to see what is going on. We can even save the files for later review and comparison with known good captures too.

In the example below, we have an 8 channel LA connected to the first 8 data lines (0-7) of the 68000 CPU in one of my Atari ST's. You don't have to connect all 8 at once, you can use as many as you need.


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What is slightly surprising it that the device shown was under £10, and whilst not the best equipment money can buy, if you're on a budget, it will do, and it will work with the Logic 2 software which can be downloaded for free from Saleae.

The harness does not come with the LA, and is one I constructed myself, however the total cost, including building a better harness was no more than £15, and well worth it as the supplied harness is really not so good.

The observant amongst you will note the blue connector is unused. This is for a CLK (Clock) signal, and is unnecessary here, but can be used if you need to tie your captures to a specific clock signal. The only other connector is the back one, which is GND.

The next image shows a very small section of the boot sequence for the Atari ST, specifically those 8 first data lines:


Logic_Analyser.png
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The things of note in this image are that big green button at the top right, which allows you to start and stop captures on the fly.

Next to note is the timescale across the top. This you will see is in mircoseconds (uS), which means what you can see here is a miniscule proportion of the whole boot sequence, so gives you the resolution to look very closely at what is going on.

Note that you can zoom in and out easily in Logic 2, so if you really want a close look at what is going on you can do so. Beware when zooming out though, going too far loses detail.

You will also note that what you see are what look like square waves. These patterns are such that a TTL one or high is seen as a high point, and a TTL low or zero is shown as a low point. Any period where the line stays flat means it has remained in a specific state for that period of time. A vertical line shows the transition between the two states.

Using the Logic 2 software, we can measure the length of time these take really accurately as seen below:


Logic_Analyser_2.png
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You can see that there are a number of measurements shown here, namely how long each pulse was active in uS, how long it was active for as a percentage of the whole cycle from on to off (Duty cycle) and the frequencies associated with the pulses.

Because the timescale is so tight, it even allows us to see the value of data on the data lines at any point in the sequence, which can be very useful to know if a machine isn't booting.

This tool is therefore very powerful if combined with the datasheet information, and given that we can record and review what happened over a period of time, it can be very useful, especially for things like address buses, where we can capture detail of the addresses being set over time, and then verify if that is what we should see. Of course, it is even more useful if we have working machines, as that will allow us to compare good to bad LA captures.

In terms of the ST, an 8 channel capture is a little limited as the CPU has a total of 16 data lines, and 23 address lines, however 16 channel LAs are available for around £60 and will work with the same software.

Of course it is not limited to just address and data lines, and many more protocols can be decoded using an LA if you are so inclined.

It's not my intention to teach you how to use this device, but let you know they are easily available, what they can do and are a handy gadget to have in your toolbox given their low cost.

They are perhaps not a beginners tool, but their price is so low it is difficult to argue against buying one.

It is not my intention to teach you how to use an LA, and I'd suggest for a deeper look and some tutorials, search for eev blog logic analyser on YouTube.

I have a 16 Channel device on order, and will add a little more here once it arrives.
Collector of many retro things!
800XL and 65XE both with Ultimate1MB,VBXL/XE & PokeyMax, SIDE3, SDrive Max, 2x 1010 cassette, 2x 1050 one with Happy mod, 3x 2600 Jr, 7800 and Lynx II
Approx 20 STs, including a 520 STM, 520 STFMs, 3x Mega ST, MSTE & 2x 32 Mhz boosted STEs
Plus the rest, totalling around 50 machines including a QL, 3x BBC Model B, Electron, Spectrums, ZX81 etc...
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rubber_jonnie
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Re: Basic Troubleshooting - Logic Analyser basics

Post by rubber_jonnie »

Thanks all for your patience on this particular article. A house move and other stuff rather got on the way!
Collector of many retro things!
800XL and 65XE both with Ultimate1MB,VBXL/XE & PokeyMax, SIDE3, SDrive Max, 2x 1010 cassette, 2x 1050 one with Happy mod, 3x 2600 Jr, 7800 and Lynx II
Approx 20 STs, including a 520 STM, 520 STFMs, 3x Mega ST, MSTE & 2x 32 Mhz boosted STEs
Plus the rest, totalling around 50 machines including a QL, 3x BBC Model B, Electron, Spectrums, ZX81 etc...
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